About this book

As high density circuits move deeper into submicron dimensions Electrostatic Discharge (ESD) effects become an increasing concern. This new edition of a classic reference presents a practical and systematic approach to ESD device physics, modelling and design techniques. The authors draw upon their wealth of industrial experience to provide a complete overview of ESD and its implications in the development of advanced integrated circuits.
Fully revised to incorporate the latest industry achievements and featuring:

• Design methods for a variety of technologies from 1 micron to the current sub-micron regimes, along with complete design approaches for MOS, BiCMOS and Power MOSFETs.
• New sections on ESD design rules, process technology effects, layout approaches, package effects and circuit simulations.
• Guidance on the implementation of circuit protection measures for a range of I/O configurations.
• Detailed coverage of ESD simulation stress models.

This unique reference provides the means to design protection circuits for a variety of applications and to diagnose and solve ESD problems in IC products. The coverage of state-of-the-art circuit design for ESD prevention will appeal to engineers and scientists working in the fields of IC and transistor design. Graduate students and researchers in device/circuit modeling and semiconductor reliability will appreciate this comprehensive coverage of ESD fundamentals.

About the Author

Dr. E. Ajith Amerasekera is a distinguished electrical engineer renowned for his significant contributions to semiconductor technology and integrated circuit design. He earned his Ph.D. in 1986 and began his career at Philips Research Labs in Eindhoven, the Netherlands, where he worked on pioneering submicron CMOS semiconductor development.
In 1991, Dr. Amerasekera joined Texas Instruments (TI) in Dallas, Texas. During his tenure at TI, he held several key positions, including Chief Technical Officer for the ASIC Business Unit and Director of ASIC Technology Strategy. He also served as Director of the Kilby Research Labs, focusing on advancing semiconductor innovation.
Dr. Amerasekera’s expertise in electrostatic discharge (ESD) protection is well-recognized. He co-authored the book “ESD in Silicon Integrated Circuits”. In addition to this work, he has published over 100 technical papers and holds more than 30 patents related to semiconductor devices and circuits.
In recognition of his leadership and contributions to semiconductor innovation, Dr. Amerasekera was named a Fellow of the Institute of Electrical and Electronics Engineers (IEEE) in 2012.
Beyond his technical achievements, Dr. Amerasekera has been an active participant in the academic and professional community, serving on technical program committees for various international conferences, including the VLSI Symposium on Circuits, the International Solid-State Circuits Conference (ISSCC), and the International Electron Devices Meeting (IEDM).
Dr. Amerasekera’s work has been instrumental in advancing the understanding and development of reliable semiconductor devices, particularly in the realm of ESD protection, thereby significantly impacting the field of integrated circuit design.

Table of contents

Preface

1. Introduction

2. ESD Phenomenon

3. Test Methods

4 Physics and Operation of ESD Protection Circuits

5 ESD Protection Design Concepts and Strategy

6 Design and Layout Requirements

ISBN:- 978-0-471-49871

7 Advanced Protection Design

8 Failure Modes, Reliability Issues, and Case Studies

9 Influence of Processing on ESD

10 Device Modeling of High Current Effects

11 Circuit Simulation Basics, Approaches, and Simulations

12 Conclusions

Future Issues

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